One way of overcoming this problem is to incorporate logic circuitry.
解决这个问题的方法之一是引入逻辑电路.
Physical units transmit information to and from the microcomputer via appropriate interface logic.
各种实体设备能够通过适当的接口逻辑电路对计算机传输(输入或输出)信息.
Flip - flops are a key component and memory cells of sequential logic circuit.
触发器是构成时序逻辑电路的存储单元和核心部件.
The number of inputs available to a given logic circuit.
通常是“逻辑电路”的简写.
In fact , we use the digital way directly to synthesize sine wave.
摘要数字电路技术课程的知识难点是时序逻辑电路的设计.
ECL is used for circuits, which will operate in a high - speed environment.
ECL( 发射极耦合逻辑电路)通常用于需要 高速运行 的环境.
A circuit that has an output only when all inputs are down.
一种逻辑电路,只有当所有的输入全为“0”时才有输出.
A new method of designing synchronous sequential logic circuits is propsed.
提出了一种设计同步时序逻辑电路的新方法.
METHODS High speed CMOS multiplexer, logic circuits and optic electronic isolation device were used.
方法采用高速CMOS多路开关 、 逻辑电路和光电隔离电路实现驱动和测量模式程控系统.
Digital Design: Binary System , Boolean Algebra, Logic Gates , Simplification of Boolean Functions , Combinational Logic.
数位设计: 二进位制 、 氏代数 、 辑闸 、 氏函数的化简、合逻辑电路.
Here, standard units include basic gate circuits, flip - flops and other basic combinational logic circuits.
在这里, 标准单元是指基本的门电路, 触发器或其他基本组合逻辑电路.
In logic circuits, pertaining to outputs corresponding to a subset of input signals that will not arise.
逻辑电路中, 用来说明跟输入信号的某个不会出现的子集相应的输出.
The thesis offers APD signal amplify circuit chart and controlling time - series logic circuit principle chart bearingvalue.
给出了APD信号放大电路和控制时序逻辑电路原理图.
The FPGA - based implementation of image lossless compression is presented.
给出了基于可编程逻辑电路(FPGA) 硬件实现图像无损压缩算法的设计与实现方法,该算法具有更高的压缩比.
And it is fit for all synchronous sequential logic circuits design.
提出了一种同步时序逻辑电路设计的新方法—次态方程联立法.